Apparatus for digital control of traffic control timers

ABSTRACT

A traffic control system utilizing digital timing signals, which can be derived from locally available 60 hertz power, to time each traffic interval. The timing signals are transformed to pulses marking the initiation of each traffic interval. These in turn are converted into signals which can be transmitted, for example via two pair of electrical conductors, from a remote traffic guidance center to a local traffic controller in which they are reconverted to signals for each traffic phase. These phase signals are then steered to switching circuits which control energization of the traffic signal indicators. The timing circuit can be utilized independently as a cyclic timer, either with or without conversion for transmission to a remote location.

United States Patent John Matysek Croat, Va.

Oct. 2, 1969 Sept. 14, 1971 Remote Coutrok Corporation Continuation-impart of application Ser. No. 826,212, May 20, 1969.

Inventor Appl. No. Filed Patented Assignec Relerences Cited UNITED STATES PATENTS 1/1968 Sanderson et al 3,423,733 1/1969 Aueretal.

ABSTRACT: A traffic control system utilizing digital timing signals, which can be derived from locally available 60 hertz power, to time each traffic interval. The timing signals are transformed to pulses marking the initiation of each traffic interval. These in turn are converted into signals which can be transmitted, for example via two pair of electrical conductors, from a remote traffic guidance center to a local traffic controller in which they are reconverted to signals for each trafi'ic phase. These phase signals are then steered to switching circuits which control energization of the traffic signal indicators. The timing circuit can be utilized independently as a cyclic timer, either with or without conversion for transmission to a remote location.

mimmswm 31305084 sumanrs INVENTOR John J. Motysek ATTORNEYS APPARATUS FOR DIGITAL CONTROL OF TRAFFIC CONTROL TIMERS This application is a continuation-in-part of US. Pat. appli' cation Ser. No. 826,212, filed May 20, 1969.

The present invention pertains to a trafiic guidance and control system and to a cyclic timer found within that system. More particularly, the present invention pertains to a system for operation of right-of-way signal indicators at traffic intersections either independently of central control or under the command of a computer which for example might be within a remote traffic guidance center. In another aspect, the present invention pertains to a cyclic timer for generating functions to control cyclic operations.

The flow of traffic in heavily traveled areas is generally guided and controlled at least in part by means of signal indicators such as the well-known red-yellow-green signal lamps which divide the right-of-way between the various conflicting traffic phases at the intersection in accordance with some predetermined sequence. In urban areas the frequency of numerous consecutive major intersections on one main roadway may require such traffic guidance indicators at each such intersection. To permit smoothest traffic flow, it is desirable that the indicators at consecutive intersections sequentially provide right-of-way on the main roadway so that a car travelling on that roadway will continuously receive the right-of-way and thus can travel from one end of the roadway to the other through the several intersections without having to stop.

The direction of heaviest traffic flow determines the direction in which right-of-way is sequentially provided, and this is liable to be different at different times of day, during morning and evening rush hours, for example. In addition, there are occasionally emergency or otherwise unusual situations during which it is desirable to suspend the nonnal operation of a right-of-way guide and instead to provide right-ofway indications suited to the particular situations. Thus, it is desirable to be able to override the normal guidance system operation during emergency situations.

In many metropolitan areas there is heavy traffic movement in all directions at particular times of day, and thus it is desired to be able to provide preferred streets for every traffic direction, so that regardless of the direction in which a motorist desires to travel, he can find a street on which he continuously receives right-of-way as he approaches consecutive intersections.

While numerous apparatus have been developed for energizing the signal indicators which divide the right-of-way between conflicting traffic phases, in general, these have been elaborate and complex electric apparatus which have been expensive to install and which are particularly subject to malfunction because of their complexity. The existing apparatus which have been capable of supervision from a centralized main guidance center either have required the existence of a large number of electrical conductors from each intersection to the centralized guidance center or have utilized a single pair of conductors on a time shared basis with elaborate commutating equipment.

Numerous existing traffic systems time the various intervals of a traffic cycle by means of analog timing circuits. Unfortunately, such analog circuits require precision components to maintain each traffic interval at its precise time. When a number of consecutive intersections on a heavily travelled roadway each have a separate local system which each include analog timing circuits and which are to be sequenced to provide sequential right-of-way at each consecutive intersection for traffic moving in a preferred direction of the main roadway, even very small variations in the analog timing circuits for the different intersections soon varies the timing cycles at one or more of the intersections with the result that the sequential right-of-way is no longer provided. Fluctuations resulting from temperature-varying components within the analog timing circuitry likewise can result in such a problem.

The present invention is a traffic guidance and control system utilizing digital timing signals derived, for example from locally available 60 hertz power to time each trafiic interval. The timing signals are transformed to signals which can be transmitted, for example via two pair of electrical lines, from a remote center to a local traffic guide which in turn converts these signals into the necessary commands for the energization of the traffic signal indicators. Two pairs of conductors can accommodate up to seven commands, and if needed additional commands can readily be handled with additional conductors on a binary basis..Altematively, the commands can be transmitted over a single wire or via a radio channel on a multiplex basis or by means of a modulation technique such as frequency modulation multiplexing.

These and other aspects and advantages of the present invention are more apparent in the following detailed description and claims, particularly when read in conjunction with the accompanying drawings in which like parts bear like reference numerals. In the drawings:

FIG. 1 is a block diagram representation of a traffic guidance and control system in accordance with the present invention;

FIG. 2 is a block diagram of a timing circuit suitable for use in the traffic guidance system of FIG. 1;

FIG. 3 is a block diagram of a function-to-line converter suitable for use in the traffic guidance system of FIG. I;

FIG. 4 is a schematic diagram of an encoder suitable for use in the function-to-line converter of FIG. 3;

FIG. 5 is a block diagram of a line-to-function converter suitable for use in the traffic guidance system of FIG. I; and

FIG. 6 is a schematic diagram of the line-to-function converter of FIG. 5.

As depicted in FIG. 1, 60 hertz excitation from a suitable source, such as a local commercially available power source, is applied via line 10 to clock 12 which provides the necessary timing signals for operation of the traffic guidance system of the present invention. These timing signals are applied by clock 12 to function-to-line converter 14 which generates the necessary traffic guidance signals from them. Clock 12 and function-to-line converter 14 might be within a remote central traffic guidance center, or they might be located at the intersection to be controlled. If at a remote location, the outputs from function-to-line converter 14 are applied by means such as via cable 16 to line-to-function converter 18 which in turn applies the desired excitation to the signal lamps within traffic signal 20. Cable 16 might be any suitable cable such as an existing telephone cable having the necessary wires available. Alternatively, cable 16 can be a single conductor having the several outputs from function-to-line converter 14 multiplexed thereon, or in place of cable 16 a radio link can be utilized. Traffic signal 20 might be any suitable device such as the well-known red-yellow-green traffic light device.

Clock 12 can be any suitable clock capable of accepting excitation such as local commercially available 60 hertz excitation and of providing the necessary timing signals. FIG. 2 depicts a suitable digital clock in which 60 hertz excitation on line 10 is applied to a shaping and dividing circuit 30 which provides a one-pulse-per-second signal on line 32. This onepulse-per-second signal is applied to dividing circuit 34 which provides ten Output signals, one in turn at one second intervals on each of the ten output lines 36 from circuit 34. Thus, each output line 36 from dividing circuit 34 is energized in turn, and the energized output line changes with each pulse on line 32. These outputs from circuit 34 thus represent one second intervals from an arbitrary time zero to a time nine seconds after time zero. The nine output line from dividing circuit 34 is connected as an input to dividing circuit 38 which can be identical to circuit 34. Circuit 38 thus provides 10 output signals, one in turn at 10 second intervals on each of 10 output lines 40, and the energized output line 40 changes with each pulse on the nine output line 36 from dividing circuit 34. The outputs from circuit 38 thus represent ten second intervals from time zero to seconds after time zero. The nine output line 40 from dividing circuit 38 is connected as an input to dividing circuit 42 which likewise can be identical with dividing circuits 34 and 38. Circuit 42 provides hundreds output time signals in turn at 100 second intervals on its 10 output lines 44, with the energized output line 44 changing with each pulse on the nine output line 40 from dividing circuit 38. These outputs from circuit 42 thus represent 100 second intervals from time zero to a time 900 seconds after time zero. By proper selection of output line combinations from dividing cir cuits 34, 38, and 42, it is thus possible to obtain a timing signal indication at any time from time zero to 999 seconds after time zero. If a greater time interval is desired, then of course another dividing circuit could be added to the chain in FIG. 2.

The 10 output lines 36 from dividing circuit 34 are connected respectively to the 10 positions of switch 50 within function-to-line converter 14, as depicted in FIG. 3. Likewise, these 10 output lines from circuit 34 are connected to the respective switch positions of lO-position switches 52, 54, and 56. In like manner, the 10 output lines 40 from dividing circuit 38 are connected respectively to the 10 positions of switches 58, 60, 62, and 64, and the 10 output lines 44 from dividing circuit 42 are connected respectively to the 10 positions of switches 66, 68, 70, and 72. AND gate 74 has its three inputs tied to the movable contacts of switches 50, 58, and 66; while AND gate 76 has its three inputs tied to the movable contacts of switches 52, 60, and 68, AND gate 78 has its three inputs tied to the movable contacts of switches 54, 62, and 70, and AND gate 80 has its three inputs tied to the movable contacts of switches 56, 64, and 72.

AND gate 74 provides an output indication to indicate the initiation of the traffic phase A right-of-way interval, designated the A-green or AG-interval. Similarly, AND gate 76 provides an output indication to initiate the traffic phase-A clearance interval, designated the A-yellow or AY-interval, AND gate 78 provides an output indication to initiate the B- green or BG-interval, and AND gate 80 provides an indication to initiate the B-yellow or BY-interval. Switches 50-72 are set to indicate the time after time zero at which their respective interval is to be initiated, with switches 50-56 indicating the units, switches 58-64 the tens, and switches 66-72 the hundreds of seconds after time zero at which the intervals are to commence. In the representative example of FIG. 3, switches 50, 58 and 66 are each set to the position, and so at time zero when clock 12 provides outputs on the zero output lines of dividing circuits 34, 38, and 42, each of the three inputs of AND gate 74 is energized so that gate 74 provides an output signal to initiate the AG interval. Likewise, switches 52, 60, and 68 are set to the time at which the AY interval is to be initiated; switches 54, 62, and 70 are set to the time at which the BG interval is to be initiated; and switches 56, 64, and 72 are set to the time at which the BY interval is to be initiated. Clock 12 can be reset in any of several manners, and as illustratively depicted in FIG. 3, to provide maximum versatility, an additional set of IO-position switches 51, 53, and 55 are connected respectively to the i0 outputs of dividing circuits 34, 38, and 42, and have their moving contacts connected as inputs to AND gate 57. The output of gate 57 is applied via line 59 to clock 12 to reset the clock to time zero, for example by resetting each dividing circuit 34, 38, and 42.

If function-to-line converter 14 is located at a remote traffic guidance center, then the outputs of AND gates 74, 76, 78, and 80 can be connected via lines 82, 84, 86, and 88, respectively, to encoder 90 which encodes the four functions AG, AY, BG, and BY to signals for transmission for example over three lines 92, 94, and 96 within cable 16 to the line-to-function converter 18 located at the intersection. Cable 16, for example, might be two pair of lines within an existing telephone cable, with the fourth line 98 utilized to provide a common reference or ground for the system. Alternatively, if the four functions AG, AY, BG, and BY are to be utilized directly to provide the necessary trafi'ic indicator signals without encoding, the outputs of AND gates 74, 76, 78, and 80 are applied via lines 81, 83, 85, and 87 to memory 89.

Circuitry suitable for use as encoder is shown in detail in FIG. 4 and includes four identical encoding circuits 1020, 1102b, 1182c, and 102d. Since these circuits are identical, only the circuitry of phase A green-encoding circuit 102a is shown in detail. Each component within AG encoding circuit 102a bears a reference numeral ending in the letter suffix a, and en coding circuits 102b, 1020, and 102d, for AY-encoding, BG- encoding, and BY-encoding, respectively, include like components which are herein referred to by like reference numbers but having the letter suffix of the encoding circuit 102b, 1020, or 102d in which they are found. NPN-transistor 104a has its base coupled through resistor 106a to the cathodes of diodes 108a, 109a, and 110a, the anodes of which are tied to input terminals 112a, 113a, and 114a respectively. The base of transistor 104a is also coupled to ground through resistor 116a. Transistor 1104a has its emitter tied to ground and its collector coupled by resistor 118a to power terminal 120a which is connected to a suitable source of positive potential such as a source of +22 volts DC. The collector of transistor 1040 is also connected to the base of NPN-transistor 122a, the collector of which is tied to power terminal 1120a. The emitter of transistor 122a is tied to the anode of silicon controlled rectifier (SCR) 124a which has its cathode coupled to ground through resistor 126a. The gate of SCR 124a is coupled through resistor 128a to the cathode of diode 130a which has its anode tied to input terminal 132a. The gate of SCR 124a is also coupled through resistor 1340 to its cathode. The cathode of SCR 124a is tied to output terminal 1360 from the AG-encoding unit 102a. Encoding units 102b-l02d contain identical circuitry.

The four encoding circuits 10211-10211 are interconnected to cyclically provide output indications as the traffic guidance system cycles through its operation. Line 82 applies the AG- pulse from AND gate 74 to input terminal 132a of unit 1020. Likewise, line 84 applies the AY-pulse from AND gate 76 to input terminal l32b of unit 102b line 86 applies the BG-pulse from AND gate 78 to input terminal 1320 of unit 1026 and line 88 applies the BY-pulse from AND gate 80 to input terminal 132d of unit 102d. Unit 102a has its output terminal 136a connected to input terminals 114C and 114d of units 1020 and 102d, respectively. Unit l02b has its output terminal 136b connected to input terminals 114a and 112d of units 102a and 102d, respectively. Unit l02c has its output terminal 1136c connected to input terminals 112a and ll4b of units 102a and 102b, respectively. Unit llOZd has its output terminal 136d connected to input terminals 11212 and 112C of units 10217 and 1026, respectively. Output terminal 1360 is coupled through diode 138 to output line 92 from encoder 90. Similarly, output terminal 136b is coupled through diode 140 to output line 94; output terminal 1360 is coupled through diodes 142 and 144 to output lines 92 and 96 respectively; and output terminal 136d is coupled through diodes 146 and 148 to output lines 94 and 96 respectively.

The four functions AG, AY, BG, and BY are encoded by encoder 90 to signals which can be transmitted via the three lines 92, 94, and 96. While only the four functions AG, AY, BG, and BY are illustrated, up to seven functions can be encoded on the three lines 92, 94, and 96 (plus a condition in which voltage is present on none of the three lines). By adding more lines additional functions can, of course, be encoded.

In the quiescent condition of encoder 90, each of the transistors 104a-104d is cut off and each of the transistors l22a-l22d is conducting. Each of the SCRs l24a-l24d is off, but current is available through the corresponding transistors l22a-ll22d to the anodes of the SCRs. When clock 12 enables one of the AND gates to apply a pulse on its output line, that pulse initiates operation of the corresponding encoding circuit 102. Thus, when AND gate 74 applies the AG-pulse on line 82 through input terminal 132a, diode 130a, and resistor 128a to the gate of SCR 124a, that SCR commences to conduct. Current then passes through SCR 124a, output terminal 136a, and diode 1138 to output line 92 from encoder 90. In addition, that current passes through input terminals 1114c and 114d, diodes 1l0c and 110d, and resistors 1060 and 106d to the bases of transistors 104 c and 104d, turning on those transistors. As a consequence, the bases of transistors 1220 and 122d are coupled to ground through the collector-emitter paths of transistors 1040 and 104d, respectively, and so transistors 122a and 1224' are cut off. This terminates the current paths to the anodes of SCR's 1240 and 124d. When clock 12 enables the next AND gate 76, the AY-pulse on line 84 turns on SCR 124b. Current from that SCR passes through output terminal 136b, input terminal 114a, diode 110a and resistor 106a to turn on transistor 1040. This cuts off transistor 122a, terminating current flow through SCR 124a, and so that SCR returns to its nonconducting condition. The current from SCR 124b also retains transistor 104d in its conductive state, thereby continuing the blockage of current from SCR 124d. This insures that SCR 124d can not be turned on by extraneous pulses or other noise to give erroneous output indications. The current from SCR 124b also passes through diode 140 to output line 94 from encoder 90. in like manner, the BG-pulse on line 86 from AND gate 78 activates encoding unit 1021: and deactivates unit 102b, while holding unit 102a in its inactive condition. Unit 1020 energizes output lines 92 and 96 from encoder 90. Similarly, the BY-pulse on line 88 from AND gate 80 activates encoding unit 102d, deactivates unit 1020, and holds unit 1021; inactive, while energizing output lines 94 and 96 from encoder 90. Thus, the four input functions AG, AY, BG, and BY are encoded into a three-line set of signals for transmission via cable 16.

As depicted in FIG. 5, within line-to-function converter 18, the signals on lines 92, 94, and 96 are applied as inputs to decoder 160 which converts them back to the four functions AG, AY, BG, and BY. These four functions are applied via lines 162, 164, 166, and 168, respectively, to function steering logic 170 which separates the signals into the necessary excitations for the trafiic lamps within traffic signal 20. Function steering logic 170 thus provides an output indication to the phase-A green switch 172 when the phase-A green lamp is to be energized, an output indication to the phase-B red switch 174 when the phase-B red lamp is to be energized, an output indication to the phase-A yellow switch 176 when the phase-A yellow lamp is to be energized, an output indication to the phase-B green switch 178 when the phase-B green lamp is to be energized, an output indication to the phase-A red switch 180 when the phase-A red lamp is to be energized, and an output indication to the phase-B yellow switch 182 when the phase-B yellow lamp is to be energized. These switches in turn are connected to the corresponding indicator lamps within traffic signal 20. Line-to-function converter 18 also receives ground line 98 which is within cable 16, thereby insuring a common voltage reference.

FIG. 6 depicts the detailed circuitry of line-to-function converter 18. Each of the lines 92, 94, and 96 entering decoder 160 from encoder 90 activates a gate control circuit. Thus, line 92 is connected to the anode of diode 202, the cathode of which is coupled through resistor 204 to the base of NPN- transistor 206. Transistor 206 has its collector coupled through resistor 208 to a source of positive voltage, its emitter tied to ground, and its base coupled to ground through resistor 210. Serially connected resistors 212 and 214 are coupled between the collector of transistor 206 and ground, and the junction of resistors 212 and 214 is tied to the base of NPN- transistor 216. Transistor 216 has its collector coupled through resistor 218 to the positive voltage source and its emitter tied to ground. Lines 94 and 96 are connected to identical gate control circuits which are shown in FIG. 6 having components bearing reference numbers identical to those associated with the corresponding components in the gate control circuit associated with line 92 but including the suffix letter a in the gate control circuit associated with line 94 and the suffix letter I; in the gate control circuit associated with line 96. Thus, these latter two gate control circuits are not described in detail.

Each trafiic phase has a three-input gate 219 associated with it to decode the signals on lines 92, 94, and 96. Thus diode 220 has its cathode tied to the collector of transistor 216, diode 220a has its cathode tied to the collector of transistor 206a, and diode 22% has its cathode tied to the collector of transistor 206b, The anodes of diodes 220, 220a and 22% are tied together and to the AG-output line 162 from decoder 160. Likewise, diode 222 has its cathode tied to the collector of transistor 206, diode 222a has its cathode tied to the collector of transistor 216a, and diode 222b has its cathode tied to the collector of transistor 206b, The anodes of diodes 222, 222a, and 222b are tied together and to the AY- output line 164 from decoder 160. Diode 224 has its cathode tied to the collector of transistor 216, diode 224a has its cathode tied to the collector of transistor 206a, and diode 224b has its cathode tied to the collector of transistor 216b. The anodes of diodes 224, 224a, and 224b are tied together and to the BG-output line 166 from decoder 160. Similarly, diode 226 has its cathode tied to the collector of transistor 206, diode 226a has its cathode tied to the collector of transistor 216a, and diode 226b, has its cathode tied to the collector of transistor 216b The anodes of diodes 226, 226a, and 22Gb are tied together and to the BY-output line 168 from decoder 160.

Within function steering logic 170, line 162 is tied to the anode of diode 228, the cathode of which is connected to the base of NPN-transistor 230. Transistor 230 has its collector tied to a source of positive voltage and its emitter coupled to ground through resistor 232. Resistor 234 couples line 162 to the positive voltage source. The emitter of transistor 230 is connected to the anodes of diodes 236, 237, and 238. Line 91, from the output of memory unit 89, is connected to the anodes of diodes 240 and 242. The cathodes of diodes 236 and 240 are tied together, and the cathodes of diodes 238 and 242 are tied together. Lines 164, 166, and 168 and their respective associated lines 93, 95, and 97 from memory unit 89 are connected to identical logic circuitry within function steering logic 170, and this identical circuitry is shown in FIG. 6 having components bearing reference numbers identical to the reference numerals utilized in the logic circuitry associated with lines 162 and 91 but including the suffix letter a in the logic circuitry associated with lines 164 and 93, the suffix letter b in the logic circuitry associated with lines 166 and 95, and the suffix letter c in the logic circuitry associated with lines 168 and 97. Thus, these latter three logic circuitry units are not described in detail. The cathodes of diodes 237, 237a, 237b, and 2370 are tied together and to output line 239 from function steering logic 170.

Input terminal 244 of phase-A green switch 172 is connected to the cathodes of diodes 238 and 242. Within switch 172, terminal 244 is tied to the first side of relay coil 246, the second side of which is tied to ground. Normally open relay contact 246a couples the gate of triac 248 to the first side of resistor 250, the second side of which is tied to the T2 terminal of triac 248. The T2 terminal of triac 248 is connected to output terminal 252 of AG switch 172 which in turn is connected to the first terminal of indicator lamp 254 which provides the phase-A green indication of traffic signal 20.

Internally, the switches 174, 176, 178, 180, and 182 contain circuitry identical with that in switch 172; therefore, this circuitry is not shown in detail, but the input terminals of switches 174-182 are designated 244a-244e, respectively, to correspond with input terminal 244 of switch 172, and the output terminals of switches 174 to 182 are designated 252a-252e, respectively, to correspond with output terminals 252. BR-switch 174 has its input terminal 244a connected to the cathodes of diodes 236, 240, 236a, and 2400 and its output terminal 252a connected to the first side of indicator lamp 256 which provides the phase-B red indication in traffic signal 20. Input terminal 244!) of AY-switch 176 is tied to the cathodes of diodes 238a and 242a, while output terminal 252b of switch 176 is connected to the first side of the phase-A yellow indicator lamp 258 within signal 20. Similarly, input ter minal 244C of BG-switch 178 is tied to the cathodes of diodes 238b and 24217, while output terminal 2520 of switch 178 is connected to the first side of the phase-B green indicator lamp 260 in signal lamp 28. AIR-switch 1811 has its input terminal 244d tied to the cathodes of diodes 236b, 2411b, 238C, and 2420 and its output terminal 252d tied to the first side of the phase-A red indicator lamp 262 in traffic signal 211. Finally, BY-switch 182 has its input terminal 2442 tied to the cathodes of diodes 236s and 240C and its output terminal 252e tied to the first side of phase-B yellow indicator lamp 264 in signal 26. The second side of each indicator lamp 254-264 is tied to one side of alternating current source 266 of suitable voltage, for example 1 volts. The T1 terminal of triac 248 is tied to the alternating current ground to which source 266 is referenced. Proper operating time of relays 246 results in the switches 172-182 having soft start and soft stop operation.

In the quiescent condition, transistors 2116, 2116a, and 2116b are cut off, and transistors 216, 216a, and 216b are conducting. Each gate 219 has the cathode of at least one of its diodes coupled to ground through a conducting transistor. Accordingly, in this quiescent condition, lines 162, 164, 166, and 168 are each at ground potential, and so transistors 2311, 239a, 230b, and 2300 are cut off. Therefore, diodes 236-236c and 238-238c have their anodes at ground potential, and the relay 246 in each switch 172-182 is deenergized. As a result, the triac 248 in each switch 172-182 is not conducting, and each indicator lamp 254-264 is deenergized. This quiescent condition, of course, is not a normal operating condition of the traffic guidance system, but might represent a standby condition in which the signal lamps are inactive.

When encoder 91) sends a signal to decoder 168 to initiate a traffic interval, the corresponding indicator lamps are energized. Thus, for example, when the AG-interval is to be initiated, encoding unit 102a receives a pulse on line 82 from AND gate 74 and in response applies a positive voltage to line 92. This turns on transistor 206, cutting off transistor 216 within decoder 161). As a consequence, the cathodes of diodes 220, 2200, and 22Gb are isolated from ground, and positive potential is applied through diode 228 to the base of transistor 230 in function steering logic 170. This turns on transistor 230, applying voltage through diodes 236 and 238 to the relay coils 246 within switches 172 and 174. The contacts 246a within switches 172 and 174 close, activating the triacs 248 therein. Alternating current from source 266 then passes through the phase-A green indicator lamp 254 and the phase- B red indicator lamp 256, energizing those indicator lamps to provide the phase-A green and the phase-B red indications.

When clock 12 steps to the time set by switches 52, 68, and 68, AND gate 76 activates AY-encoding unit 182b, thereby applying voltage to line 94 and deactivating encoding unit 1020 to remove the voltage from line 92. As a result, transistor 206 turns off, transistor 216 turns on, transistor 2116a turns on, and transistor 216a turns off. The AG-line 162 is then connected to ground through diode 220, and so transistor 231 turns off, removing voltage from relay 246 within switch 172 to cause that relay to deenergize and removing voltage from the relay within switch 174. Each of the diodes 22, 222a, and 2221; within the AY-gate 219 has its cathode isolated from ground, and so voltage is applied through diode 228a to turn on transistor 230a. This provides current through diodes 236a and 2380 to switches 174 and 176. Consequently, the relay within switch 174 remains energized, while the relay within switch 176 energizes. The triac within switch 176 then becomes conductive, energizing lamp 258. Lamp 256, of course, remains energized, and so the traffic signal provides the phase-A yellow and the phase-B red indications. At the first negative half cycle of voltage from source 266 following the opening of the relay contact 246a within switch 172, the triac 248 within that switch stops conducting, and so lamp 254 is deenergized, terminating the phase-A green indication. Of course, should it be desired to provide both green and yellow indications during the clearance interval of a traffic phase, power gating between the transistors 2311-2300 and the switches 172-182 can easily accomplish that.

in like manner, the application of a pulse on line 86 by AND gate '78 turns off AY-encoding unit 1112b and turns on BG-encoding unit 1820. This removes the voltage from line 94 and applies voltage to lines 92 and 96. Consequently, all of the transistors within decoder 1611 change state, and AY-line 164 is coupled to ground through both diodes 222 and 222a and their associated transistors 206 and 2160. Consequently, transistor 2311a cuts off, removing power from switches 174 and 176. The cathode of each diode 224, 2240, and 224b is isolated from ground, and voltage is applied through diode 22811 to turn on transistor 2311b. Current then passes through diodes 2316b and 1238b to activate the AR-switch 180 and the BG-svvitch 178. Consequently, indicators 260 and 262 are energized to provide the phase-B green and the phase-A red indications. Indicators 256 and 258 deenergize at the first negative half cycle of current from source 266 following the opening of the relay contacts in switches 174 and 176.

At the time set by switches 56, 64, and 72, AND gate applies a pulse on line 88 to turn on BY-encoding unit 102d, thereby turning off BG-encoding unit 1020 Voltage is then present on lines 94 and 96, and so BG-line 166 is at ground potential, while BY-line 168 is isolated from ground. Voltage is then applied through diode 228C to turn on transistor 230a. Transistor 2311b cuts off, removing excitation from switches 178 and 1811. Excitation from transistor 2311c is applied to switches 181) and 182, and so indicators 262 and 264 are energized, while indicator 261) is deenergized. At the time set by switches 51, 53, and 55 an output pulse from AND gate 57 is applied via line 59 through appropriate circuitry to clock 12 to reset the clock to time zero to commence timing the next traffic cycle.

1f the outputs of AND gates 74, 76, 78, and 80 are to drive function steering logic 170 without use of encoder 90 and decoder 161), the AG, AY, BG, and BY pulses are applied by lines 81, 83, 85, and 87, respectively, to memory unit 89. Memory unit 89 transforms the pulses received from AND gates 74-86 into continuous signals. Thus, upon receipt of the AG-pulse applied from AND gate 74 to memory unit 89 by line 81, the memory unit applies a constant voltage to line 91. Receipt of the AY-pulse on line 83 from AND gate 76 terminates this AG-voltage on line 91 and initiates an AYvoltage on line 93. Likewise, the BG-pulse terminates the AY-voltage on line 93 and initiates a BG-voltage on line 95, and the BY- pulse from AND gate 80 terminates the BG-voltage on line 95 and initiates a BY-voltage on line 97 which in turn is terminated by the next AG-pulse from AND gate 74. By way of example, memory unit 89 might be a group of bistable multivibrators, one associated with each function AG, AY, BG, and BY. As another example, memory unit 89 might be a set of four circuits such as encoding circuits 102, but providing discrete output indications rather than utilizing diodes 138-148. The AG, AY, BG, and BY signals on lines 91, 93, 95, and 97, respectively, are applied to their associated diodes 2411-2400 and 242-2420 in function steering logic 171) to energize switches 172-182 in the same manner as is done by the AG, AY, BG, and BY signals from decoder 160. If the traffic guide is to be located at the intersection, then most likely memory unit 89 would be utilized rather than encoder 90 and decoder 1611. Likewise, the outputs of memory unit 89 can be multiplexed for transmission to function steering logic 17 0 at a remote location.

lfit is desired to guide an emergency vehicle through the intersection, flashing indications can be provided. Thus, for example, if an emergency vehicle is proceeding along the phase- A street, a pulsing current of, for example, one pulse per second can be applied through input terminal 113b and diode 1119b to resistor 1116b in AY-encoding unit 102b, while a con stant voltage is applied on AY-line 84. As a result, a one pulse per second signal appears on line 94, causing AY-indicator lamp 258 and BR-indicator lamp 256 to flash at one hertz. Likewise, a pulsing current applied to input terminal 113d and a constant voltage on line 88 cause BY-indicator 264 and AR- indicator 262 to flash when an emergency vehicle is to be guided along the phase-B street. lf alternating flashing red and flashing yellow are desired on both streets, then the pulsing current is applied alternately to input terminals l13b and 113d with constant voltage on lines 84 and 88.

if it is desired to energize the traffic indicators in response to signals from a remote computer, for example, during morning or evening rush hours or for fully synchronized centrally guided system operation, the computer functions can be applieu .0 input lines 92, 94, and 96 of decoder 160, while clock 12 is inhibited to prevent generation of its timing signals, or while each encoding unit 102 is disabled by a constant voltage on terminals 113a-l13d or by connecting line 239 to these terminals ll3a-ll3d. Alternatively, lines 91, 93, 95, and 97 can be connected to the outputs of variable timers 102a, 102b, 1026, and 102d shown in FIG. 2 of U.S. Pat. application Ser. No. 826,2l2 if analog timing is preferred. Such analog time signals could be applied as inputs to encoder 90 to permit transmission on two pair of wires, if desired, or a simple network such as diodes 138-148 could be added to the outputs of the analog timing units.

The outputs of AND gates 74, 76, 78, and 80 or of memory unit 89 can be utilized in any application in which a cyclic timer is required. Thus, these cyclic outputs could be utilized to control a machine tool operation or to control different lights on an advertising display or for other such cyclic operations. Likewise, the cyclic timing signals can be encoded and decoded by units 90 and 160, respectively, for transmission via two pairs of conductors to a remote location.

Sequential operation of right-of-way indicators at consecutive traffic intersections is readily achieved by adjusting the switches 5072 for the several intersections to initiate the several traffic intervals at the desired time with respect to time zero. A single digital clock 12 can be utilized for the several guidance systems, or separate digital clocks 12 can be utilized in each guidance system if these clocks are properly synchronized. In addition, traffic guidance systems in accordance with the present invention can be utilized in large intersection systems such as described and depicted in FIG. 4 in U.S. Pat. application Ser. No. 826,212.

While a two phase traffic guidance system has been described, additional traffic phases can readily be handled simply by adding the necessary switches and gates to functionto-line converter 14 and the necessary gates, logic circuitry and switches to line-to-function converter 18. The switches 5072 permit considerable variation of each traffic cycle. Additional variation can be obtained by utilizing various input frequencies on line to clock 12. Thus, provision can be made for switching the input to clock 12 from a local commercially available 60 hertz line to a pulse generator having controllable frequency. Then, the time duration of the traffic cycles can be increased or decreased as desired, while maintaining complete system synchronization. For example, temporary manual inputs to clock 12 can provide long trafi'rc cycles to accommodate parades, congestion following ball games, emergencies, etc. In addition, by applying a fast pulse rate signal on line 10, rapid operation can be obtained with the traffic guidance system connected to an intersection system simulator to enable rapid evaluation of various traffic cycle sequences.

1 claim:

1. A cyclic timer comprising:

1. clock means adapted for connection to an alternating current voltage source for providing timing pulses at discrete time intervals;

2. a plurality of conversion circuits, each including:

a. a gating circuit having a plurality of input terminals and an output terminal, the output terminal providing an output signal when and only when an input signal is applied to each input terminal; and

b. pulse selection means connecting each input terminal of an associated gating circuit to said clock means and capable of applying selected timing pulses from said clock means to the input terminals of said associated gating circuit to cause an output signal at the output terminal of said associated gating circuit in response to a preselected one of the clock means timing pulses; and

3. means connecting the output terminal of one of said gating circuits to said clock means to reset said clock means in response to an output signal on that gating circuit output terminal.

2. A cyclic timer as claimed in claim 1 in which each conversion circuit further comprises memory means connected to the output terminal of the associated gating circuit to provide a function signal when that gating circuit is the most recent gating circuit to have generated a gating circuit output signal.

3. A cyclic timer as claimed in claim 1 further comprising:

1. encoding means connected to said gating circuit output terminals for encoding output signals from said plurality of gating circuits into a lesser plurality of line signals; and

2. decoding means connected to said encoding means for decoding said line signals into a plurality of function signals corresponding with said gating circuits output signals.

A traffic control system comprising:

. clock means adapted for connection to an alternating current voltage source for providing timing pulses at discrete time intervals;

2. a plurality of'conversion circuits, each including:

a. a gating circuit having a plurality of input terminals and an output terminal, the output terminal providing an output signal when and only when an input signal is applied to each input terminal; and

. pulse selection means connecting each input terminal of an associated gating circuit to said clock means and capable of applying selected timing pulses from said clock means to the input terminals of said associated gating circuit to cause an output signal at the output terminal of said associated gating circuit in response to a preselected one of the clock means timing pulses;

c. memory means connected to the output terminal of the associated gating circuit to provide a function signal when that gating circuit is the most recent gating circuit to have generated a gating circuit output signal;

3. means connecting the output terminal of one of said gating circuits to said clock means to reset said clock means in response to an output signal on that gating circuit output terminal; and

4. function steering means connected to said memory means for transforming function signals into traffic control commands for each traffic interval at an intersection.

5. A traffic control system as claimed in claim 4 further comprising further switching means connected to said function steering means and adapted for connection to traffic signal indicators and to a power source for switching power to traffic signal indicators in response to traffic control commands.

6. A traffic control system comprising:

1. clock means adapted for connection to an alternating current voltage source for providing timing pulses at discrete time intervals;

2. a plurality of conversion circuits, each including:

a. a gating circuit having a plurality of input terminals and an output terminal, the output terminal providing an output signal when and only when an input signal is applied to each input terminal; and

. pulse selection means connecting each input terminal of an associated gating circuit to said clock means and capable of applying selected timing pulses from said clock means to the input terminals of said associated gating circuit to cause an output signal at the output terminal of said associated gating circuit in response to a preselected one of the clock means timing pulses;

3. means connecting the output terminal of one of said gating circuits to said clock means to reset said clock means in response to an output signal on that gating circuit output terminal;

ill

4. encoding means connected to said gating circuit output terminals for encoding output signals from said plurality of gating circuits into a lesser plurality of line signals;

5. decoding means connected to said encoding means for decoding said line signals into a plurality of function signals corresponding with said gating circuit output signals; and

6. function steering means connected to said decoding means for transforming function signals into trafiic control commands for each traffic interval at an intersection.

7. A traffic control system as claimed in claim 6 further comprising further switching means connected to said function steering means and adapted for connection to traffic signal indicators and to a power source for switching power to the traffic signal indicators in response to traffic control commands.

8. A cyclic timer comprising:

1. a plurality of conversion circuits for transforming digital timing signals into function signals, each conversion circuit including:

a. a gating circuit having a plurality of input terminals and an output terminal, the output terminal providing an output signal when and only when an input signal is applied to each input terminal; and

b. pulse selection means connected to each input terminal of an associated gating circuit and adapted for connection to a source of digital timing pulses and capable of applying selected timing pulses from the source of digital timing pulses to the input terminals of said associated gating circuit to cause an output signal at the output terminal of the associated gating circuit in response to a preselected digital timing pulse;

2. reset means connected to the output terminal of one of said gating circuits and adapted to apply a reset signal to the source of digital timing pulses in response to an output signal on that gating circuit output terminal. 

1. A cyclic timer comprising:
 1. clock means adapted for connection to an alternating current voltage source for providing timing pulses at discrete time intervals;
 2. a plurality of conversion circuits, each including: a. a gating circuit having a plurality of input terminals and an output terminal, the output terminal providing an output signal when and only when an input signal is applied to each input terminal; and b. pulse selection means connecting each input terminal of an associated gating circuit to said clock means and capable of applying selected timing pulses from said clock means to the input terminals of said associated gating circuit to cause an output signal at the output terminal of said associated gating circuit in response to a preselected one of the clock means timing pulses; and
 3. means connecting the output terminal of one of said gating circuits to said clock means to reset said clock means in response to an output signal on that gating circuit output terminal.
 2. a plurality of conversion circuits, each including: a. a gating circuit having a plurality of input terminals and an output terminal, the output terminal providing an output signal when and only when an input signal is applied to each input terminal; and b. pulse selection means connecting each input terminal of an associated gating circuit to said clock means and capable of applying selected timing pulses from said clock means to the input terminals of said associated gating circuit to cause an output signal at the output terminal of said associated gating circuit in response to a preselected one of the clock means timing pulses; and
 2. A cyclic timer as claimed in claim 1 in which each conversion circuit further comprises memory means connected to the output terminal of the associated gating circuit to provide a function signal when that gating circuit is the most recent gating circuit to have generated a gating circuit output signal.
 2. a plurality of conversion circuits, each including: a. a gating circuit having a plurality of input terminals and an output terminal, the output terminal providing an output signal when and only when an input signal is applied to each input terminal; and b. pulse selection means connecting each input terminal of an associated gating circuit to said clock means and capable of applying selected timing pulses from said clock means to the input terminals of said associated gating circuit to cause an outpUt signal at the output terminal of said associated gating circuit in response to a preselected one of the clock means timing pulses; c. memory means connected to the output terminal of the associated gating circuit to provide a function signal when that gating circuit is the most recent gating circuit to have generated a gating circuit output signal;
 2. a plurality of conversion circuits, each including: a. a gating circuit having a plurality of input terminals and an output terminal, the output terminal providing an output signal when and only when an input signal is applied to each input terminal; and b. pulse selection means connecting each input terminal of an associated gating circuit to said clock means and capable of applying selected timing pulses from said clock means to the input terminals of said associated gating circuit to cause an output signal at the output terminal of said associated gating circuit in response to a preselected one of the clock means timing pulses;
 2. decoding means connected to said encoding means for decoding said line signals into a plurality of function signals corresponding with said gating circuits output signals.
 2. reset means connected to the output terminal of one of said gating circuits and adapted to apply a reset signal to the source of digital timing pulses in response to an output signal on that gating circuit output terminal.
 3. means connecting the output terminal of one of said gating circuits to said clock means to reset said clock means in response to an output signal on that gating circuit output terminal;
 3. means connecting the output terminal of one of said gating circuits to said clock means to reset said clock means in response to an output signal on that gating circuit output terminal; and
 3. A cyclic timer as claimed in claim 1 further comprising:
 3. means connecting the output terminal of one of said gating circuits to said clock means to reset said clock means in response to an output signal on that gating circuit output terminal.
 4. function steering means connected to said memory means for transforming function signals into traffic control commands for each traffic interval at an intersection.
 4. encoding means connected to said gating circuit output terminals for encoding output signals from said plurality of gating circuits into a lesser plurality of line signals;
 4. A traffic control system comprising:
 5. decoding means connected to said encoding means for decoding said line signals into a plurality of function signals corresponding with said gating circuit output signals; and
 5. A traffic control system as claimed in claim 4 further comprising further switching means connected to said function steering means and adapted for connection to traffic signal indicators and to a power source for switching power to traffic signal indicators in response to traffic control commands.
 6. A traffic control system comprising:
 6. function steering means connected to said decoding means for transforming function signals into traffic control commands for each traffic interval at an intersection.
 7. A traffic control system as claimed in claim 6 further comprising further switching means connected to said function steering means and adapted for connection to traffic signal indicators and to a power source for switching power to the traffic signal indicators in response to traffic control commands.
 8. A cyclic timer comprising: 